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ggml-cpu : add a q1_0 vec dot kernel for xtheadvector Copilot Setup Steps #2: Commit 7ba260b pushed by xctan
2m 7s xthead_q1_0
xthead_q1_0
2m 7s
ggml-cpu : add a q1_0 vec dot kernel for xtheadvector Python Type-Check #18: Commit 7ba260b pushed by xctan
3m 31s xthead_q1_0
xthead_q1_0
3m 31s
ggml-cpu : add a q1_0 vec dot kernel for xtheadvector Update Operations Documentation #7: Commit 7ba260b pushed by xctan
45s xthead_q1_0
xthead_q1_0
45s
ggml-cpu : add a q1_0 vec dot kernel for xtheadvector Check Pre-Tokenizer Hashes #8: Commit 7ba260b pushed by xctan
1m 4s xthead_q1_0
xthead_q1_0
1m 4s
ggml-cpu : add a q1_0 vec dot kernel for xtheadvector Python check requirements.txt #18: Commit 7ba260b pushed by xctan
5m 46s xthead_q1_0
xthead_q1_0
5m 46s
ggml-cpu : add riscv vec dot kernel dispatch based on vlen Python check requirements.txt #17: Commit f7b3fc0 pushed by xctan
3m 19s rvv-vlen-dispatch
rvv-vlen-dispatch
3m 19s
ggml-cpu : add riscv vec dot kernel dispatch based on vlen Python Type-Check #17: Commit f7b3fc0 pushed by xctan
2m 34s rvv-vlen-dispatch
rvv-vlen-dispatch
2m 34s
ggml-cpu : add riscv vec dot kernel dispatch based on vlen Check Pre-Tokenizer Hashes #7: Commit f7b3fc0 pushed by xctan
31s rvv-vlen-dispatch
rvv-vlen-dispatch
31s
ggml-cpu : add riscv vec dot kernel dispatch based on vlen Update Operations Documentation #6: Commit f7b3fc0 pushed by xctan
11s rvv-vlen-dispatch
rvv-vlen-dispatch
11s
ggml-cpu : add runtime rvv detection Python check requirements.txt #16: Commit 4739e47 pushed by xctan
3m 50s rvv_vlen_agnostic
rvv_vlen_agnostic
3m 50s
ggml-cpu : add runtime rvv detection Python Type-Check #16: Commit 4739e47 pushed by xctan
2m 28s rvv_vlen_agnostic
rvv_vlen_agnostic
2m 28s
ggml-cpu : add runtime rvv detection Check Pre-Tokenizer Hashes #6: Commit 4739e47 pushed by xctan
30s rvv_vlen_agnostic
rvv_vlen_agnostic
30s
ggml-cpu : add RISC-V Zvfh impl for ggml_vec_mad_f16 Python check requirements.txt #15: Commit 8ad2654 pushed by xctan
3m 35s rvv_vec_mad_f16
rvv_vec_mad_f16
3m 35s
ggml-cpu : add RISC-V Zvfh impl for ggml_vec_mad_f16 Update Operations Documentation #5: Commit 8ad2654 pushed by xctan
9s rvv_vec_mad_f16
rvv_vec_mad_f16
9s
ggml-cpu : add RISC-V Zvfh impl for ggml_vec_mad_f16 Python Type-Check #15: Commit 8ad2654 pushed by xctan
2m 17s rvv_vec_mad_f16
rvv_vec_mad_f16
2m 17s
ggml-cpu : add RISC-V Zvfh impl for ggml_vec_mad_f16 Check Pre-Tokenizer Hashes #5: Commit 8ad2654 pushed by xctan
29s rvv_vec_mad_f16
rvv_vec_mad_f16
29s
ggml-cpu : optimize RVV q2_k and q3_k kernels Update Operations Documentation #4: Commit 27ee658 pushed by xctan
13s rvv-optim-2
rvv-optim-2
13s
ggml-cpu : optimize RVV q2_k and q3_k kernels Check Pre-Tokenizer Hashes #4: Commit 27ee658 pushed by xctan
48s rvv-optim-2
rvv-optim-2
48s
ggml-cpu : optimize RVV q2_k and q3_k kernels Python check requirements.txt #14: Commit 27ee658 pushed by xctan
5m 2s rvv-optim-2
rvv-optim-2
5m 2s
ggml-cpu : optimize RVV q2_k and q3_k kernels Python Type-Check #14: Commit 27ee658 pushed by xctan
2m 26s rvv-optim-2
rvv-optim-2
2m 26s
ggml-cpu : fix riscv include Python check requirements.txt #13: Commit cf71ea6 pushed by xctan
4m 18s rvv-optim
rvv-optim
4m 18s
ggml-cpu : fix riscv include Check Pre-Tokenizer Hashes #3: Commit cf71ea6 pushed by xctan
30s rvv-optim
rvv-optim
30s
ggml-cpu : fix riscv include Python Type-Check #13: Commit cf71ea6 pushed by xctan
1m 32s rvv-optim
rvv-optim
1m 32s
Python check requirements.txt Python check requirements.txt #12: Commit f5d61a4 pushed by xctan
4m 19s rvv-optim
rvv-optim
4m 19s
Check Pre-Tokenizer Hashes Check Pre-Tokenizer Hashes #2: Commit f5d61a4 pushed by xctan
29s rvv-optim
rvv-optim
29s