Prototype NVFP4 with FP8 UE5M3 block scales - #3325
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Co-authored-by: Teddy Do <tdophung@nvidia.com> Co-authored-by: Varun Thumbe <vthumbe@nvidia.com> Signed-off-by: Tim Moon <tmoon@nvidia.com>
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* [PyTorch] Enable e5m3 fused GEMM kernels from cuDNN Signed-off-by: Kaining Zhong <kainingz@nvidia.com> * have to pad to 256 to use cuDNN Signed-off-by: Kaining Zhong <kainingz@nvidia.com> * fix: need to pass scale_dtype Signed-off-by: Kaining Zhong <kainingz@nvidia.com> * route wgrad to cuDNN's wgrad API Signed-off-by: Kaining Zhong <kainingz@nvidia.com> * Support grouped linear with NVFP4-UE5M3 NVFP4-UE5M3 grouped GEMM falls back to dense GEMMs. Generalize usage of wgrad kernel and use when tensors sizes are not 256-aligned. Fix inconsistent m,n,k GEMM notation. Remove ue5m3 hacks in op fuser tests. Add ue5m3 to grouped MLP tests. Signed-off-by: Tim Moon <tmoon@nvidia.com> * Fix typos Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Tim Moon <tmoon@nvidia.com> --------- Signed-off-by: Kaining Zhong <kainingz@nvidia.com> Signed-off-by: Tim Moon <tmoon@nvidia.com> Co-authored-by: Tim Moon <tmoon@nvidia.com> Co-authored-by: Codex <noreply@openai.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Greptile SummaryThis proof-of-concept adds UE5M3 block-scale support throughout NVFP4 quantization, tensor metadata, bindings, GEMM paths, and tests.
Confidence Score: 5/5The pull request appears safe to merge because no blocking failure remains from the previously reported issues. No blocking failure remains. Important Files Changed
Flowchart%%{init: {'theme': 'neutral'}}%%
flowchart LR
Recipe["NVFP4 recipe<br/>UE5M3 scale format"] --> Quantizer["NVFP4Quantizer<br/>scale_dtype"]
Quantizer --> Tensor["NVFP4 tensor/storage<br/>FP4 data + UE5M3 scales"]
Tensor --> Bindings["PyTorch/C++ bindings"]
Bindings --> Kernels["Quantize/dequantize kernels"]
Bindings --> GEMM["cuDNN grouped and dense GEMM"]
Reviews (15): Last reviewed commit: "Enable cuDNN GGEMM+GLU+RHT+quant kernel" | Re-trigger Greptile |
Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Kaining Zhong <kainingz@nvidia.com>
Signed-off-by: Kaining Zhong <kainingz@nvidia.com>
Signed-off-by: Kaining Zhong <kainingz@nvidia.com>
for more information, see https://pre-commit.ci
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Signed-off-by: Tim Moon <tmoon@nvidia.com>
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Description
This is a proof-of-concept for NVFP4 with FP8 UE5M3 block scales. Quantization is supported natively and GEMMs go through the cuDNN Frontend kernels (see NVIDIA/cudnn-frontend#545).
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Changes
Checklist: